As a means for increasing the number of simultaneous sound generation, there are systems using a plurality of sound source chips. A method for sharing a waveform memory with a plurality of sound source chips to avoid an increase in the cost required by provision of plural waveform memories is adopted in some of such systems.
For example, a structure, wherein at least two sound source chips are included, and musical tones are generated by reading out respective data from a common waveform memory with respective system counters synchronized (with memory access being performed under the control of a common clock), is utilized in an electronic musical instrument or the like.
FIG. 22 shows a conventional musical tone generating apparatus, which uses two sound source chips 1000 and 1001 sharing a waveform memory 1002 (in a two-chip mode). This apparatus has an address bus from a master sound source 1000 connected to the waveform memory 1002, and a data bus from the waveform memory 1002 connected to the master sound source 1000 and the slave sound source 1001.
Although the address bus from the master sound source to the waveform memory 1002 comprises a 24-bit bus, the slave sound source 1001 and the master sound source 1000 are serially connected together as shown in FIG. 23. A slave address is transferred to the side of the master sound source 1000 by being subjected to parallel-serial conversion on the side of the slave sound source 1001 to be divided into four sections, being serially transmitted to the master sound source by 6 bits for each one channel time. The transferred slave address is subjected to serial-parallel conversion on the side of the master sound source 1000 to be transformed into 24 bits.
The master sound source 1000 performs memory access twice, one in a former half and one in a latter half of one channel operation. A data read out by memory access in the former half is received by the master sound source 1000, and a data read out by memory access in the latter half is received by the slave sound source 1001.
On the other hand, FIG. 24 shows a state wherein in accordance with an external signal, a mode change has been made to effect a one-chip mode using only the sound source 1000 (single sound source mode) in the above-mentioned structure. In this time, the sound source 1000 outputs an address to the waveform memory 1002, and the waveform memory outputs a data to the sound source 1000 as shown in the timing chart of FIG. 25. After that, a state without processing continues for a while, and the same processing as the above-mentioned processing is repeated in a subsequent channel time.